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Andrzej Chydziński

2008

  • Chydziński A.; Winiarczyk R.; On the Blocking Probability in BatchMarkovian Arrival Queues; Microprocessors and Microsystems; 2008

2006

  • Chydziński A.; Winiarczyk R.; Blocking Probability in a BMAP Queue; Conference Procciding, ISCC'06, pp547-553; 2006

2005

  • Chydziński A.; Winiarczyk R.; Distribution of the First Buffer Overflow Time in a Deterministic Service Time Queue; Proc. Of 10-th IEEE Symposium on Computers and Communications; 2005

2003

  • Smolka B.; Lukac R.; Chydziński A.; Plataniotis K.; Wojciechowski K.; Fast adaptive similarity based impulsive noise reduction filter; Real Time Imaging; 2003

2002

  • Smolka B.; Chydziński A.; Wojciechowski K.; Plataniotis K.; Venetsanopoulos A.; Self-adaptive algorithm of impulsive noise reduction in color images; Pattern Recognition; 2002

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Important information

Register of Research Institutes: RIN-IV-3/98

NIP: 631-011-22-45

REGON: 000564702

ePUAP inbox: /IITISPAN/SkrytkaESP

e-Delivery: AE:PL-33995-65265-VDDUI-33

PIC (Participant Identification Code): 951424501

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  • +48 32 330 23 89

E-mail address: office@iitis.pl

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